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Arista designs keys to win the last nanosecond

Arista designs keys to win the last nanosecond

Arista Networks He wants to create networks with the lowest possible delay. This is useful, among other things, for traders in the stock markets, where every nanosecond of profit or loss is calculated. Other applications monitor fast and large networks and implement firewalls that cause minimal delays.

To this end, it uses a combination of technologies from Broadcom, Intel, Barefoot Networks, AMD, and Xilinx. CPUs, FPGAs and Asics are used in the new version 7130 . series of the keys.


The 7130 Elber It combines a Broadcom Jericho2 switch chip, a set of Xilinx programmable FPGAs, and an octa-core CPU. The latter is only responsible for operating the operating system, and all network workloads are handled by the chips assigned to it. There are six 10Gb QSFP-DD interfaces and 48 SFP ports, which can be divided into 96 connections.


In the 7130 B AMD and Xilinx will be replaced by Intel’s Tofino chip, a fully programmable network chip with a latency of less than 10 nanoseconds. This model also has up to 256 configurable ports with 32 10Gb QSFP-DD interfaces. Both models are available as customer samples, and should be available in the last quarter of this year.

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